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HCPL-3150 (Single Channel), HCPL-315J (Dual Channel)
0.5 Amp Output Current IGBT Gate Drive Optocoupler
Data Sheet
Lead (Pb) Free RoHS 6 fully compliant
RoHS 6 fully compliant options available; -xxxE denotes a lead-free product
Description
The HCPL-315X consists of an LED optically coupled toanintegratedcircuitwithapoweroutputstage.This optocouplerisideallysuitedfordrivingpowerIGBTsand MOSFETs used in motor control inverter applications. The high operating voltage range of theoutput stage providesthedrivevoltagesrequiredbygatecontrolled devices.ThevoltageandcurrentsuppliedbythisoptocouplermakesitideallysuitedfordirectlydrivingIGBTs withratingsupto1200V/50A.ForIGBTswithhigherratings,theHCPL-3150/315Jcanbeusedtodriveadiscrete powerstagewhichdrivestheIGBTgate.
Features
* 0.6Amaximumpeakoutputcurrent * 0.5Aminimumpeakoutputcurrent * 15kV/sminimumCommonModeRejection(CMR) atVCM=1500V * 1.0Vmaximumlowleveloutputvoltage(VOL) eliminatesneedfornegativegatedrive * ICC=5mAmaximumsupplycurrent * UnderVoltageLock-Outprotection(UVLO)with hysteresis * WideoperatingVCCrange:15to30volts * 0.5smaximumpropagationdelay * +/-0.35smaximumdelaybetween devices/channels * Industrialtemperaturerange:-40Cto100C * HCPL-315J:channelonetochanneltwooutput isolation=1500Vrms/1min. * Safetyandregulatoryapproval: ULrecognized(UL1577),3750Vrms/1min. IEC/EN/DINEN60747-5-2approved VIORM=630Vpeak(HCPL-3150option060only) VIORM=891Vpeak(HCPL-315J)CSAcertified
TRUTH TABLE LED OFF ON ON ON VCC - VEE "Positive Going" (i.e., Turn-On) 0 - 30 V 0 - 11 V 11 - 13.5 V 13.5 - 30 V VCC - VEE "Negative-Going" (i.e., Turn-Off) 0 - 30 V 0 - 9.5 V 9.5 - 12 V 12 - 30 V VO LOW LOW TRANSITION HIGH
Applications
* IsolatedIGBT/MOSFETgatedrive * ACandbrushlessdcmotordrives * Industrialinverters * SwitchModePowerSupplies(SMPS) * UninterruptablePowerSupplies(UPS)
Functional Diagram
N/C ANODE CATHODE N/C 1 2 3 4 8 7 6 5 VCC VO VO ANODE SHIELD HCPL-3150 VEE CATHODE N/C 6 7 8
SHIELD
N/C ANODE CATHODE
1 2 3
SHIELD
16 VCC 15 VO 14 VEE
11 VCC 10 VO 9 VEE
HCPL-315J
A0.1FbypasscapacitormustbeconnectedbetweentheVCCandVEEpinsforeachchannel.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Selection Guide: Invertor Gate Drive Optoisolators
Package Type Part Number Number of Channels IEC/EN/DIN EN 60747-5-2 Approvals UL Approval Output Peak Current CMR (minimum) UVLO Fault Status 0.5A HCPL-3150 1 VIORM 630 Vpeak Option 060 3750 Vrms/1 min. 2A 15 kV/s Yes No 2A 8-Pin DIP (300 mil) HCPL-3120 1 HCPL-J312 1 VIORM 891Vpeak 3750 Vrms/1 min. 0.4A 10 kV/s No HCPL-J314 1 Widebody (400 mil) HCNW-3120 1 VIORM 1414 Vpeak 5000 Vrms/1min. 2A 0.5A 15 kV/s Yes Yes HCPL-315J 2 Small Outline SO-16 HCPL-316J 1 VIORM 891 Vpeak 3750 Vrms/1 min. 2A 0.4A 10 kV/s No No HCPL-314J 2
Ordering Information
HCPL-3150andHCPL-315JareULRecognizedwith3750Vrmsfor1minuteperUL1577. Option Part Number RoHS Compliant -000E -300E HCPL-3150 -500E -060E -360E -560E HCPL-315J -000E -500E Non RoHS Compliant No option #300 #500 #060 #360 #560 No option #500 SO-16 300 mil DIP-8 x x x x x x x x x x x x x x x x x x Package Surface Mount Gull Wing Tape & Reel IEC/EN/DIN EN 60747-5-2 Quantity 50 per tube 50 per tube 1000 per reel 50 per tube 50 per tube 1000 per reel 45 per tube 850 per reel
Toorder,chooseapartnumberfromthepartnumbercolumnandcombinewiththedesiredoptionfromtheoption columntoformanorderentry. Example1: HCPL-3150-560Etoorderproductof300milDIPGullWingSurfaceMountpackageinTapeandReelpackaging withIEC/EN/DINEN60747-5-2SafetyApprovalinRoHScompliant. Example2: HCPL-3150toorderproductof300milDIPpackageintubepackagingandnonRoHScompliant. Optiondatasheetsareavailable.ContactyourAvagosalesrepresentativeorauthorizeddistributorforinformation. Remarks:Thenotation`#XXX'isusedforexistingproducts,while(new)productslaunchedsince15thJuly2001and RoHScompliantoptionwilluse`-XXXE'.
2
Package Outline Drawings
Standard DIP Package
9.40 (0.370) 9.90 (0.390) 8 7 6 5
OPTION CODE* DATE CODE 6.10 (0.240) 6.60 (0.260) 7.36 (0.290) 7.88 (0.310)
A 3150 Z YYWW PIN ONE 1.19 (0.047) MAX. 3.56 0.13 (0.140 0.005) PIN ONE 1 2 3 4
0.20 (0.008) 0.33 (0.013)
5 TYP.
1.78 (0.070) MAX.
4.70 (0.185) MAX. DIMENSIONS PIN DIAGRAM IN MILLIMETERS AND (INCHES). 0.51 (0.020) MIN. 2.92 (0.115) MIN. * MARKING CODE LETTER FOR OPTION NUMBERS. 1 VDD1 VDD2 8 "V" = OPTION 060. OPTION NUMBERS 300 AND 500 NOT MARKED. 2 VIN+ VOUT+ 7 NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. 3V V 6
IN- OUT-
0.76 (0.030) 1.40 (0.055)
0.65 (0.025) MAX. 2.28 (0.090) 2.80 (0.110)
4
GND1 GND2 5
Package Outline Drawings
Gull-Wing Surface-Mount Option 300
LAND PATTERN RECOMMENDATION 9.65 0.25 (0.380 0.010)
8 7 6 5
OPTION CODE*
1.016 (0.040)
A 3150 Z YYWW
1 2 3 4
6.350 0.25 (0.250 0.010)
10.9 (0.430)
MOLDED
1.27 (0.050) 1.780 (0.070) MAX. 9.65 0.25 (0.380 0.010) 7.62 0.25 (0.300 0.010)
2.0 (0.080)
1.19 (0.047) MAX.
3.56 0.13 (0.140 0.005)
0.20 (0.008) 0.33 (0.013)
1.080 0.320 (0.043 0.013) 2.540 (0.100) BSC
0.635 0.130 (0.025 0.005)
0.635 0.25 (0.025 0.010) 12 NOM.
DIMENSIONS IN MILLIMETERS (INCHES). TOLERANCES (UNLESS OTHERWISE SPECIFIED): xx.xx = 0.01 xx.xxx = 0.005 LEAD COPLANARITY MAXIMUM: 0.102 (0.004) NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
*MARKING CODE LETTER FOR OPTION NUMBERS. "V" = OPTION 060. OPTION NUMBERS 300 AND 500 NOT MARKED.
3
16 - Lead Surface Mount
LAND PATTERN RECOMMENDATION 16 15 14 11 10 9
GND1
VCC1
VO1
10.36 0.20 (0.408 0.008)
GND2
(0.295 0.004) 7.49 0.10
VCC2
VO2
HCPL-315J
(0.458) 11.63
VIN1
VIN2
NC
1
2
3
6
7
NC
8
V1
V2
(0.085) 2.16 (0.025) 0.64
(0.004 - 0.011) 0.10 - 0.30 STANDOFF
(0.345 0.008) 8.76 0.20
VIEW FROM PIN 16 9 (0.025 MIN.) 0.64 (0.138 0.005) 3.51 0.13
0 - 8 (0.0091 - 0.0125) 0.23 - 0.32 (0.408 0.008) 10.36 0.20
VIEW FROM PIN 1
(0.018) (0.050) 0.457 1.27 (0.406 0.007) 10.31 0.18
ALL LEADS TO BE COPLANAR (0.002 INCHES) 0.05 mm. DIMENSIONS IN (INCHES) AND MILLIMETERS. NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
4
Solder Reflow Thermal Profile
300
PREHEATING RATE 3C + 1C/-0.5C/SEC. REFLOW HEATING RATE 2.5C 0.5C/SEC. PEAK TEMP. 245C PEAK TEMP. 240C
TEMPERATURE (C)
200
160C 150C 140C
PEAK TEMP. 230C
2.5C 0.5C/SEC. 30 SEC. 3C + 1C/-0.5C 30 SEC.
SOLDERING TIME 200C
100
PREHEATING TIME 150C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE
ROOM TEMPERATURE
0
0
50
100
150
200
250
TIME (SECONDS)
Note: Non-halide flux should be used.
Recommended Pb-Free IR Profile
TIME WITHIN 5 C of ACTUAL PEAK TEMPERATURE 20-40 SEC.
tp Tp TL
TEMPERATURE
260 +0/-5 C 217 C RAMP-UP 3 C/SEC. MAX. 150 - 200 C
Tsmax Tsmin
RAMP-DOWN 6 C/SEC. MAX.
ts PREHEAT 60 to 180 SEC. 25
tL
60 to 150 SEC.
t 25 C to PEAK
TIME NOTES: THE TIME FROM 25 C to PEAK TEMPERATURE = 8 MINUTES MAX. Tsmax = 200 C, Tsmin = 150 C
Note: Non-halide flux should be used.
Regulatory Information
TheHCPL-3150andHCPL-315Jhavebeenapprovedbythefollowingorganizations: UL RecognizedunderUL1577,ComponentRecognition Program,FileE55361. CSA ApprovedunderCSAComponentAcceptanceNotice #5,FileCA88324. IEC/EN/DIN EN 60747-5-2 Approvedunder: IEC60747-5-2:1997+A1:2002 EN60747-5-2:2001+A1:2002 DINEN60747-5-2(VDE0884 Teil2):2003-01. (Option060andHCPL-315Jonly)
5
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics
Description InstallationclassificationperDINVDE 0110/1.89,Table1 forratedmainsvoltage150Vrms forratedmainsvoltage300Vrms forratedmainsvoltage600Vrms Symbol 55/100/21 VIORM HCPL-3150#060 I-IV I-III 55/100/21 2 630 2 891 Vpeak HCPL-315J I-IV I-IV I-III Unit
ClimaticClassification PollutionDegree(DINVDE0110/1.89) MaximumWorkingInsulationVoltage InputtoOutputTestVoltage,Methodb* VIORMx1.875=VPR,100%Production Testwithtm=1sec, Partialdischarge<5pC InputtoOutputTestVoltage,Methoda* VIORMx1.5=VPR,TypeandSample Test,tm=60sec, VPR Partialdischarge<5pC
VPR
1181
1670
Vpeak
945 VIOTM
1336 6000
Vpeak 6000 Vpeak
HighestAllowableOvervoltage* (TransientOvervoltagetini=10sec) Safety-LimitingValues-MaximumValues AllowedintheEventofaFailure,Also SeeFigure37,ThermalDeratingCurve. CaseTemperature S T InputCurrent OutputPower
175 IS,INPUT PS,OUTPUT RS
175 230 600 109
C 400 1200 109
mA mW
InsulationResistanceatTS,VIO=500V
*RefertothefrontoftheoptocouplersectionofthecurrentCatalog,underProductSafetyRegulationssectionIEC/EN/DINEN60747-5-2,fora detaileddescriptionofMethodaandMethodbpartialdischargetestprofiles. Note:Isolationcharacteristicsareguaranteedonlywithinthesafetymaximumratingswhichmustbeensuredbyprotectivecircuitsinapplication.
6
Insulation and Safety Related Specifications
Parameter Symbol
MinimumExternal AirGap (ExternalClearance) MinimumExternal Tracking (ExternalCreepage) MinimumInternal PlasticGap (InternalClearance) TrackingResistance (ComparativeTracking Index) IsolationGroup L(101) L(102) CTI
HCPL-3150
7.1 7.4 0.08 175
HCPL-315J
8.3 8.3 0.5 175
Units
mm mm mm Volts
Conditions
Measuredfrominputterminals tooutputterminals,shortest distancethroughair. Measuredfrominputterminals tooutputerminals,shortest distancepathalongbody . Throughinsulationdistance conductortoconductor. DINIEC112/VDE0303Part1

IIIa
IIIa

MaterialGroup(DINVDE0110, 1/89,Table1)
Option300-surfacemountclassificationisClassAinaccordancewtihCECC00802.
Absolute Maximum Ratings
Parameter
StorageTemperature OperatingTemperature AverageInputCurrent PeakTransientInputCurrent (<1spulsewidth,300pps) ReverseInputVoltage "High"PeakOutputCurrent "Low"PeakOutputCurrent SupplyVoltage OutputVoltage OutputPowerDissipation TotalPowerDissipation SolderReflowTemperatureProfile
Symbol
TS TA IF(AVG) IF(TRAN) VR IOH(PEAK) IOL(PEAK) (VCC-VEE) VO(PEAK) P O P T
Min.
-55 -40 0 0
Max.
125 100 25 1.0 5 0.6 0.6 35 VCC 250 295
Units
C C mA A Volts A A Volts Volts mW mW
Note
1,16
2,16 2,16
3,16 4,16
LeadSolderTemperature 260Cfor10sec.,1.6mmbelowseatingplane eePackageOutlineDrawingsSection S
Recommended Operating Conditions
Parameter
PowerSupplyVoltage InputCurrent(ON) InputVoltage(OFF) OperatingTemperature
Symbol
(VCC-VEE) IF(ON) VF(OFF) TA
Min.
15 7 -3.6 -40
Max.
30 16 0.8 100
Units
Volts mA V C
7
Electrical Specifications (DC) Overrecommendedoperatingconditions(TA=-40to100C,IF(ON)=7to16mA,VF(OFF)=-3.6to0.8V,VCC=15to30V, VEE=Ground,eachchannel)unlessotherwisespecified. Parameter
HighLevel OutputCurrent LowLevel OutputCurrent HighLevelOutput Voltage LowLevelOutput Voltage HighLevel SupplyCurrent LowLevel SupplyCurrent ThresholdInput CurrentLowtoHigh ThresholdInput VoltageHightoLow InputForwardVoltage Temperature Coefficientof ForwardVoltage InputReverse BreakdownVoltage InputCapacitance UVLOThreshold UVLOHysteresis BVR CIN VUVLO+ VUVLO- UVLOHYS 5 3 11.0 9.5 70 12.3 10.7 1.6 13.5 12.0 V pF V V HCPL-3150 HCPL-315J IR=10A IR=10A VF VF/TA 1.2 1.5 1.6 -1.6 1.8 1.95 V HCPL-3150 HCPL-315J IF=10mA 16
Symbol
IOH IOL VOH VOL ICCH ICCL IFLH VFHL
Min.
0.1 0.5 0.1 0.5 (VCC-4) 0.8
Typ.*
0.4 0.6 (VCC-3) 0.4 2.5 2.7 2.2 2.6
Max.
1.0 5.0 5.0 5.0 6.4
Units
A A V V mA mA mA V
Test Conditions
VO=(VCC-4V)2,3, VO=(VCC-15V) VO=(VEE+2.5V) VO=(VEE+15V) IO=-100mA IO=100mA OutputOpen,7,8 IF=7to16mA OutputOpen, VF=-3.0to+0.8V HCPL-3150 HCPL-315J IO=0mA, VO>5V
Fig.
5
17
Note
2 5 2 6,7
5,6,
18
1,3, 19 4,6, 20 16
9,15, 21
mV/C IF=10mA
f=1MHz,VF=0V VO>5V, IF=10mA 22, 36
*AlltypicalvaluesatTA=25CandVCC-VEE=30V,unlessotherwisenoted.
8
Switching Specifications (AC) Overrecommendedoperatingconditions(TA=-40to100C,IF(ON)=7to16mA,VF(OFF)=-3.6to0.8V,VCC=15to30V, VEE=Ground,eachchannel)unlessotherwisespecified. Parameter
PropagationDelay TimetoHigh OutputLevel PropagationDelay TimetoLow OutputLevel PulseWidth Distortion PropagationDelay DifferenceBetween AnyTwoParts orChannels RiseTime FallTime UVLOTurnOn Delay UVLOTurnOff Delay OutputHighLevel CommonMode Transient Immunity OutputLowLevel CommonMode Transient Immunity t r tf tUVLOON tUVLOOFF |CMH| |CML| 15 15 0.1 0.1 0.8 0.6 30 30 s s s s kV/s kV/s VO>5V, IF=10mA VO<5V, IF=10mA TA=25C, IF=10to16mA, VCM=1500V, VCC=30V TA=25C, VCM=1500V, VF=0V, VCC=30V 11,13 24 11,12 22 23 PDD (tPHL-tPLH) -0.35 0.35 s 34,36 10 PWD 0.3 s 15
Symbol
tPLH tPHL
Min.
0.10 0.10
Typ.*
0.30 0.3
Max.
0.50 0.50
Units
s s
Test Conditions
Rg=47, Cg=3nF, f=10kHz, DutyCycle=50%
Fig.
10,11, 12,13, 14,23
Note
14
9
Package Characteristics (eachchannel,unlessotherwisespecified) Parameter
Input-Output Momentary WithstandVoltage** Output-Output Momentary WithstandVoltage** Resistance (Input-Output) Capacitance I-O C (Input-Output) LED-to-Case LC ThermalResistance LED-to-Detector ThermalResistance Detector-to-Case ThermalResistance
Symbol
VISO VO-O RI-O LD DC
Device
HCPL-3150 HCPL-315J HCPL-315J HCPL-3150 HCPL-315J HCPL-3150 HCPL-3150 HCPL-3150
Min.
3750 3750 1500
Typ.*
1012 0.6 1.3 391 439 119
Max.

Units
Vrms Vrms pF C/W C/W C/W
Test Conditions
RH<50%, t=1min., TA=25C RH<50% t=1min., TA=25C VI-O=500VDC f=1MHz
Fig.
Note
8,9
17
9
Thermocouple 28 locatedatcenter undersideof package
18
*AlltypicalvaluesatTA=25CandVCC-VEE=30V,unlessotherwisenoted. **TheInput-Output/Output-OutputMomentaryWithstandVoltageisadielectricvoltageratingthatshouldnotbeinterpretedasaninput-output/output-outputcontinuousvoltagerating.ForthecontinuousvoltageratingrefertoyourequipmentlevelsafetyspecificationorAvagoApplicationNote1074entitled"OptocouplerInput-OutputEnduranceVoltage." Notes: 1.Deratelinearlyabove70Cfree-airtemperatureatarateof0.3mA/C. 2.Maximumpulsewidth=10s,maximumdutycycle=0.2%.ThisvalueisintendedtoallowforcomponenttolerancesfordesignswithIOpeak minimum=0.5A.SeeApplicationssectionforadditionaldetailsonlimitingIOHpeak. 3.Deratelinearlyabove70Cfree-airtemperatureatarateof4.8mW/C. 4.Deratelinearlyabove70Cfree-airtemperatureatarateof5.4mW/C.ThemaximumLEDjunctiontemperatureshouldnotexceed125C. 5.Maximumpulsewidth=50s,maximumdutycycle=0.5%. 6.InthistestV ismeasuredwithadcloadcurrent.WhendrivingcapacitiveloadsVOHwillapproachVCCasIOHapproacheszeroamps. OH 7.Maximumpulsewidth=1ms,maximumdutycycle=20%. 8.InaccordancewithUL1577,eachHCPL-3150optocouplerisprooftestedbyapplyinganinsulationtestvoltage4500Vrms(5000Vrmsfor theHCPL-315J)for1second(leakagedetectioncurrentlimit,II-O5A).Thistestisperformedbeforethe100%productiontestforpartial discharge(methodb)shownintheIEC/EN/DINEN60747-5-2InsulationCharacteristicsTable,ifapplicable. 9.Deviceconsideredatwo-terminaldevice:pinsoninputsideshortedtogetherandpinsonoutputsideshortedtogether. 10.ThedifferencebetweentPHLandtPLHbetweenanytwopartsorchannelsunderthesametestcondition. 11.Pins1and4(HCPL-3150)andpins3and4(HCPL-315J)needtobeconnectedtoLEDcommon. 12.Commonmodetransientimmunityinthehighstateisthemaximumtolerable|dVCM /dt|ofthecommonmodepulse,VCM,toassurethatthe outputwillremaininthehighstate(i.e.,VO>15.0V ). 13.Commonmodetransientimmunityinalowstateisthemaximumtolerable|dVCM/dt|ofthecommonmodepulse,VCM,toassurethattheoutputwillremaininalowstate(i.e.,VO<1.0V ). 14.Thisloadconditionapproximatesthegateloadofa1200V/25AIGBT. 15.PulseWidthDistortion(PWD)isdefinedas|tPHL-tPLH|foranygivendevice. 16.Eachchannel. 17. Deviceconsideredatwoterminaldevice:Channeloneoutputsidepinsshortedtogether,andchanneltwooutputsidepinsshortedtogether. 18. SeethethermalmodelfortheHCPL-315Jintheapplicationsectionofthisdatasheet.
10
(VOH - VCC ) - HIGH OUTPUT VOLTAGE DROP - V
0
(VOH - VCC ) - OUTPUT HIGH VOLTAGE DROP - V
IOH - OUTPUT HIGH CURRENT - A
-1
IF = 7 to 16 mA IOUT = -100 mA VCC = 15 to 30 V VEE = 0 V
0.50
0.45 0.40 0.35 0.30
IF = 7 to 16 mA VOUT = VCC - 4 V VCC = 15 to 30 V VEE = 0 V
-1 100 C 25 C -40 C
-2 -3 -4 -5 -6 IF = 7 to 16 mA VCC = 15 to 30 V VEE = 0 V 0 0.2 0.4
-2
-3
-4 -40 -20
0
20
40
60
80
100
0.25 -40 -20
0
20
40
60
80
100
0.6
0.8
1.0
TA - TEMPERATURE - C
TA - TEMPERATURE - C
IOH - OUTPUT HIGH CURRENT - A
Figure 1. VOH vs. Temperature.
HCPL-3150 fig 1
Figure 2. IOH vs. Temperature.
HCPL-3150 fig 2
Figure 3. VOH vs. IOH.
HCPL-3150 fig 3
1.0
VOL - OUTPUT LOW VOLTAGE - V
IOL - OUTPUT LOW CURRENT - A
0.8 0.6 0.4 0.2
0.8 0.6 0.4 0.2 VF(OFF) = -3.0 to 0.8 V VOUT = 2.5 V VCC = 15 to 30 V VEE = 0 V 0 20 40 60 80 100
VOL - OUTPUT LOW VOLTAGE - V
VF(OFF) = -3.0 to 0.8 V IOUT = 100 mA VCC = 15 to 30 V VEE = 0 V
1.0
5 VF(OFF) = -3.0 to 0.8 V VCC = 15 to 30 V 4 VEE = 0 V 3 2 1 0
0 -40 -20
0
20
40
60
80
100
0 -40 -20
100 C 25 C -40 C 0 0.2 0.4 0.6 0.8 1.0 IOL - OUTPUT LOW CURRENT - A
TA - TEMPERATURE - C
TA - TEMPERATURE - C
Figure 4. VOL vs. Temperature.
HCPL-3150 fig 4
Figure 5. IOL vs. Temperature.
HCPL-3150 fig 5
Figure 6. VOL vs. IOL.
HCPL-3150 fig 6
3.5
ICC - SUPPLY CURRENT - mA ICC - SUPPLY CURRENT - mA
3.5
IFLH - LOW TO HIGH CURRENT THRESHOLD - mA
5 4 3 2 1 0 -40 -20
ICCH ICCL 3.0
ICCH ICCL 3.0
VCC = 15 TO 30 V VEE = 0 V OUTPUT = OPEN
2.5 VCC = 30 V VEE = 0 V IF = 10 mA for ICCH IF = 0 mA for ICCL 0 20 40 60 80 100
2.5
2.0
2.0
IF = 10 mA for ICCH IF = 0 mA for ICCL TA = 25 C VEE = 0 V 15 20 25 30
1.5 -40 -20
1.5
0
20
40
60
80
100
TA - TEMPERATURE - C
VCC - SUPPLY VOLTAGE - V
TA - TEMPERATURE - C
Figure 7. ICC vs. Temperature.
HCPL-3150 fig 7
Figure 8. ICC vs. VCC.
HCPL-3150 fig 8
Figure 9. IFLH vs. Temperature.
HCPL-3150 fig 9
11
500
Tp - PROPAGATION DELAY - ns
Tp - PROPAGATION DELAY - ns
Tp - PROPAGATION DELAY - ns
400
IF = 10 mA TA = 25 C Rg = 47 Cg = 3 nF DUTY CYCLE = 50% f = 10 kHz
500
TPLH TPHL
400
VCC = 30 V, VEE = 0 V Rg = 47 , Cg = 3 nF TA = 25 C DUTY CYCLE = 50% f = 10 kHz
500
400
IF(ON) = 10 mA IF(OFF) = 0 mA VCC = 30 V, VEE = 0 V Rg = 47 , Cg = 3 nF DUTY CYCLE = 50% f = 10 kHz
300
300
300
200
200 TPLH TPHL 100 6 8 10 12 14 16
200 TPLH TPHL 100 -40 -20 0 20 40 60 80 100
100
15
20
25
30
VCC - SUPPLY VOLTAGE - V
IF - FORWARD LED CURRENT - mA
TA - TEMPERATURE - C
Figure 10. Propagation Delay vs. VCC.
HCPL-3150 fig 10
Figure 11. Propagation Delay vs. IF.
HCPL-3150 fig 11
Figure 12. Propagation Delay vs. Temperature.
HCPL-3150 fig 12
500
Tp - PROPAGATION DELAY - ns
Tp - PROPAGATION DELAY - ns
400
400
VO - OUTPUT VOLTAGE - V
VCC = 30 V, VEE = 0 V TA = 25 C IF = 10 mA Cg = 3 nF DUTY CYCLE = 50% f = 10 kHz
500
VCC = 30 V, VEE = 0 V TA = 25 C IF = 10 mA Rg = 47 DUTY CYCLE = 50% f = 10 kHz
30 25 20 15 10 5 0
300
300
200 TPLH TPHL 100 0 50 100 150 200
200 TPLH TPHL 100 0 20 40 60 80 100
0
1
2
3
4
5
Rg - SERIES LOAD RESISTANCE -
Cg - LOAD CAPACITANCE - nF
IF - FORWARD LED CURRENT - mA
Figure 13. Propagation Delay vs. Rg.
HCPL-3150 fig 13
Figure 14. Propagation Delay vs. Cg.
HCPL-3150 fig 14
Figure 15. Transfer Characteristics.
HCPL-3150 fig 15
1000
IF - FORWARD CURRENT - mA
TA = 25C IF VF - +
100 10 1.0 0.1 0.01 1.20
0.001 1.10
1.30
1.40
1.50
1.60
VF - FORWARD VOLTAGE - V
Figure 16. Input Current vs. Forward Voltage.
HCPL-3150 fig 16
12
1
8 0.1 F + -
1
8 0.1 F IOL + VCC = 15 - to 30 V 2.5 V + -
2 IF = 7 to 16 mA 3
7
4V + VCC = 15 - to 30 V
2
7
6 IOH
3
6
4
5
4
5
Figure 17. IOH Test Circuit.
Figure 18. IOL Test Circuit.
HCPL-3150 fig 17
HCPL-3150 fig 18
1
8 0.1 F VOH + VCC = 15 - to 30 V
1
8 0.1 F 100 mA + VCC = 15 - to 30 V
2 IF = 7 to 16 mA 3
7
2
7
6 100 mA
3
6
VOL
4
5
4
5
Figure 19. VOH Test Circuit.
Figure 20. VOL Test Circuit.
HCPL-3150 fig 19
HCPL-3150 fig 20
1
8 0.1 F
1
8 0.1 F
2 IF 3
7 VO > 5 V + VCC = 15 - to 30 V
IF = 10 mA
2
7 VO > 5 V + - VCC
6
3
6
4
5
4
5
Figure 21. IFLH Test Circuit.
Figure 22. UVLO Test Circuit.
HCPL-3150 fig 22
HCPL-3150 fig 21
13
1 IF = 7 to 16 mA + 10 KHz - 500 2
8 0.1 F 7 VO + - VCC = 15 to 30 V IF tr tf 90% 50% VOUT tPLH tPHL 10%
50% DUTY CYCLE
3
6
47 3 nF
4
5
Figure 23. tPLH, tPHL, tr, and tf Test Circuit and Waveforms.
VCM IF 1 A B 2 7 VO 3 6 + - VCC = 30 V VO SWITCH AT A: IF = 10 mA VO SWITCH AT B: IF = 0 mA + VCM = 1500 V - VOL 8 0.1 F HCPL-3150 fig 23 0V t VOH V t = VCM t
5V
+ -
4
5
Figure 24. CMR Test Circuit and Waveforms.
Applications Information
Eliminating Negative IGBT Gate Drive
HCPL-3150 fig 24
To keep the IGBT firmly off, the HCPL-3150/315J has a very low maximumVOL specification of 1.0V .The HCPL3150/315J realizes this very low VOL by using a DMOS transistorwith4(typical)onresistanceinitspulldown circuit.WhentheHCPL-3150/315Jisinthelowstate,the IGBTgateisshortedtotheemitterbyRg+4.MinimizingRgandtheleadinductancefromtheHCPL-3150/315J totheIGBTgateandemitter(possiblybymountingthe HCPL-3150/315JonasmallPCboarddirectlyabovethe IGBT)caneliminatetheneedfornegativeIGBTgatedrive
inmanyapplicationsasshowninFigure25.Careshould betakenwithsuchaPCboarddesigntoavoidrouting the IGBT collector or emitter traces close to the HCPL3150/315Jinputasthiscanresultinunwantedcoupling of transient signals into the HCPL-3150/315J and degrade performance. (If the IGBT drain must be routed neartheHCPL-3150/315Jinput,thentheLEDshouldbe reverse-biasedwhenintheoffstate,topreventthetransientsignalscoupledfromtheIGBTdrainfromturning ontheHCPL-3150/315J.)
+5 V 1 270 2 CONTROL INPUT 74XXX OPEN COLLECTOR
HCPL-3150 8 0.1 F 7 + - VCC = 18 V
+ HVDC
Rg Q1
3
6
3-PHASE AC
4
5 Q2
- HVDC
Figure 25a. Recommended LED Drive and Application Circuit.
14
HCPL-3150 fig 25
+5 V CONTROL INPUT 74XX OPEN COLLECTOR 270 1
HCPL-315J 16 0.1 F 2 15 + -
FLOATING SUPPLY VCC = 18 V
+ HVDC
Rg
3 GND 1
14
3-PHASE AC
6 11 0.1 F 7 10 + - VCC = 18 V
+5 V 270
CONTROL INPUT 74XX OPEN COLLECTOR
Rg
8 GND 1
9
- HVDC
Figure 25b. Recommended LED Drive and Application Circuit (HCPL-315J).
HCPL-3150 fig 25b
Selecting the Gate Resistor (Rg) to Minimize IGBT Switching Losses. Step 1: Calculate Rg Minimum From the IOL Peak Specification. The IGBTandRginFigure26canbeanalyzedasasimpleRC circuitwithavoltagesuppliedbytheHCPL-3150/315J. (VCC - VEE - VOL) Rg IOLPEAK = = (VCC - VEE - 1.7 V) IOLPEAK (15 V + 5 V - 1.7 V) 0.6 A
Step 2: Check the HCPL-3150/315J Power Dissipation and Increase Rg if Necessary. TheHCPL-3150/315Jtotalpowerdissipation (PT )isequaltothesumoftheemitterpower(PE)andthe outputpower(PO): PT = PE + PO PE = IF * V * Duty Cycle F PO = PO(BIAS) + PO (SWITCHING) = ICC*(V - VEE) + ESW(RG, QG) *f CC ForthecircuitinFigure26withIF(worstcase)=16mA, Rg=30.5,MaxDutyCycle=80%,Qg=500nC,f=20 kHzandTAmax=90C: PE = 16 mA * 1.8 V * 0.8 = 23 mW PO = 4.25 mA * 20 V + 4.0 J*20 kHz = 85 mW + 80 mW = 165 mW > 154 mW (PO(MAX) @ 90C = 250mW-20C* 4.8 mW/C)
= 30.5 TheVOL value of 2V in the previous equation is a conservative value ofVOL at the peak current of 0.6A (see Figure6).AtlowerRgvaluesthevoltagesuppliedbythe HCPL-3150/315Jisnotanidealvoltagestep.Thisresults inlowerpeakcurrents(moremargin)thanpredictedby thisanalysis.WhennegativegatedriveisnotusedVEEin thepreviousequationisequaltozerovolts.
15
+5 V 1 270 2 CONTROL INPUT 74XXX OPEN COLLECTOR
HCPL-3150 8 0.1 F 7 + - VCC = 15 V
+ HVDC
Rg Q1 - + VEE = -5 V
3
6
3-PHASE AC
4
5 Q2
- HVDC
Figure 26a. HCPL-3150 Typical Application Circuit with Negative IGBT Gate Drive.
+5 V 1 CONTROL INPUT 74XX OPEN COLLECTOR 270 2
HCPL-315J
HCPL-3150 fig 26
16 0.1 F 15 + -
FLOATING SUPPLY VCC = 15 V
+ HVDC
Rg - + VEE = -5 V
3 GND 1
14
3-PHASE AC
+5 V 270
6
11 0.1 F + -
VCC = 15 V
CONTROL INPUT 74XX OPEN COLLECTOR
7
10
Rg - + VCC = -5 V
8 GND 1
9
- HVDC
Figure 26b. HCPL-315J Typical Application Circuit with Negative IGBT Gate Drive.
HCPL-3150 fig 26b
PE Parameter IF VF
Description LEDCurrent LEDOnVoltage MaximumLED DutyCycle
DutyCycle

PO Parameter ICC VCC VEE ESW(Rg,Qg) f
Description SupplyCurrent PositiveSupplyVoltage NegativeSupplyVoltage EnergyDissipatedintheHCPL-3150/315Jfor eachIGBTSwitchingCycle(SeeFigure27) SwitchingFrequency
16
Thevalueof4.25mAforICCinthepreviousequationwas obtainedbyderatingtheICCmaxof5mA(whichoccurs at-40C)toICCmaxat90C(seeFigure7). SincePOforthiscaseisgreaterthanPO(MAX),Rgmustbe increasedtoreducetheHCPL-3150powerdissipation. PO(SWITCHING MAX) = PO(MAX) - PO(BIAS) = 154 mW - 85 mW = 69 mW ESW(MAX) = PO(SWITCHINGMAX) f = 3.45 J
FromthethermalmodeinFigure28atheLEDanddetectorICjunctiontemperaturescanbeexpressedas: TJE=PE * (LC||(LD+DC)+CA) * LC* DC + PD +CA LC+DC+LD
(
)+ T
A
(
LC* DC TJD=PE + CA LC+DC+LD
)
+PD* (DC||(LD+LC)+CA)+ TA Inserting the values for LC and DC shown in Figure 28 gives: TJE=PE * (230C/W+CA)+PD* (49C/W+CA)+ TA TJD=PE * (49C/W+CA)+PD* (104C/W+CA)+ TA Forexample,givenPE=45mW,PO=250mW,TA=70C andCA=83C/W:
TJE=PE* 313C/W+PD* 132C/W+ TA
= 69 mW 20 kHz
ForQg=500nC,fromFigure27,avalueofESW=3.45J givesaRg=41.
Thermal Model (HCPL-3150)
The steady state thermal model for the HCPL-3150 is showninFigure28a.Thethermalresistancevaluesgiven inthismodelcanbeusedtocalculatethetemperatures ateachnodeforagivenoperatingcondition.Asshown bythemodel,allheatgeneratedflowsthroughCAwhich raisesthecasetemperatureTCaccordingly.Thevalueof CAdependsontheconditionsoftheboarddesignand is, therefore, determined by the designer.The value of CA=83C/Wwasobtainedfromthermalmeasurements using a 2.5 x 2.5 inch PC board, with small traces (no ground plane), a single HCPL-3150 soldered into the centeroftheboardandstillair.Theabsolutemaximum power dissipation derating specifications assume a CAvalueof83C/W.
=45mW* 313C/W+250mW* 132C/W+70C=117C
TJD=PE* 132C/W+PD* 187C/W+ TA
=45mW* 132C/W+250mW* 187C/W+70C=123C TJEandTJDshouldbelimitedto125Cbasedontheboard layoutandpartplacement(CA)specifictotheapplication.
LD = 439C/W TJE LC = 391C/W TC CA = 83C/W* TJD DC = 119C/W

TA
TJE= LEDjunctiontemperature TTJE = LED JUNCTION TEMPERATURE = detectorICjunctiontemperature JD TJD = DETECTOR IC JUNCTION TEMPERATURE TC=CASE TEMPERATURE MEASURED AT THE casetemperaturemeasuredatthecenterofthepackagebottom TC = LC=CENTER OF THE PACKAGE BOTTOM LED-to-casethermalresistance LC = LED-TO-CASE THERMAL RESISTANCE = LED-TO-DETECTOR THERMAL RESISTANCE LED-to-detectorthermalresistance LD LD = DC= DETECTOR-TO-CASE THERMAL RESISTANCE DC = detector-to-casethermalresistance CA = case-to-ambientthermalresistance CA= CASE-TO-AMBIENT THERMAL RESISTANCE *CA WILL DEPEND ON THE BOARD DESIGN AND CAwilldependontheboarddesignandtheplacementofthepart. THE PLACEMENT OF THE PART.
Figure 28a. Thermal Model.
HCPL-3150 fig 28
17
Thermal Model Dual-Channel (SOIC-16) HCPL-315J Optoisolator
Definitions 1,2,3,4,5,6,7,8,9,10:ThermalimpedancesbetweennodesasshowninFigure28b.AmbientTemperature:Measuredapproximately1.25cmabovetheoptocouplerwithnoforcedair. Description Thisthermalmodelassumesthata16-pindual-channel (SOIC-16) optocoupler is soldered into an 8.5 cm x 8.1 cmprintedcircuitboard(PCB).Theseoptocouplersare hybrid devices with four die: two LEDs and two detectors.ThetemperatureattheLEDandthedetectorofthe optocoupler can be calculated by using the equations below. TE1A=A11PE1+A12PE2+A13PD1+A14PD2 TE2A=A21PE1+A22PE2+A23PD1+A24PD2 TD1A=A31PE1+A32PE2+A33PD1+A34PD2 TD2A=A41PE1+A42PE2+A43PD1+A44PD2 where:
7
LED 1 2
1 3
LED 2
4
5
DETECTOR 1 8 10
DETECTOR 2 6
9
AMBIENT
Figure 28b. Thermal Impedance Model for HCPL-315J.
HCPL-3150 fig 28b
PE1
PD1
TE1A=TemperaturedifferencebetweenambientandLED1 TE2A=TemperaturedifferencebetweenambientandLED2 TD1A=Temperaturedifferencebetweenambientanddetector1 TD2A=Temperaturedifferencebetweenambientanddetector2 PE1=PowerdissipationfromLED1; PE2=PowerdissipationfromLED2; PD1=Powerdissipationfromdetector1; PD2=Powerdissipationfromdetector2 Axythermalcoefficient(unitsinC/W)isafunctionofthermalimpedances1through10.
PE2
PD2
HCPL-3150 fig 28b
Thermal Coefficient Data(unitsinC/W)
Part Number HCPL-315J A11, A22 198 A12, A21 64 A13, A31 62 A24, A42 64 A14, A41 83 A23, A32 90 A33, A44 137 A34, A43 69
Note: Maximumjunctiontemperatureforabovepart:125C.
18
LED Drive Circuit Considerations for Ultra High CMR Performance
Withoutadetectorshield,thedominantcauseofoptocoupler CMR failure is capacitive coupling from the inputsideoftheoptocoupler,throughthepackage,tothe detectorICasshowninFigure29.TheHCPL-3150/315J improvesCMRperformancebyusingadetectorICwith an optically transparent Faraday shield, which diverts thecapacitivelycoupledcurrentawayfromthesensitive ICcircuitry.However,thisshielddoesnoteliminatethe capacitive coupling between the LED and optocoupler pins5-8asshowninFigure30.Thiscapacitivecoupling causesperturbationsintheLEDcurrentduringcommon modetransientsandbecomesthemajorsourceofCMR failuresforashieldedoptocoupler.ThemaindesignobjectiveofahighCMRLEDdrivecircuitbecomeskeeping theLEDintheproperstate(onoroff )duringcommon mode transients. For example, the recommended application circuit (Figure 25), can achieve 15kV/s CMR whileminimizingcomponentcomplexity. TechniquestokeeptheLEDintheproperstatearediscussedinthenexttwosections.
CMR with the LED Off (CMRL)
A high CMR LED drive circuit must keep the LED off (VFVF(OFF))duringcommonmodetransients.Forexample,duringa-dVCM/dttransientinFigure31,thecurrent flowingthroughCLEDPalsoflowsthroughtheRSATandVSAT ofthelogicgate.AslongasthelowstatevoltagedevelopedacrossthelogicgateislessthanVF(OFF),theLEDwill remainoffandnocommonmodefailurewilloccur. Theopencollectordrivecircuit,showninFigure32,cannotkeeptheLEDoffduringa+dVCM/dttransient,since all the current flowing through CLEDN must be supplied bytheLED,anditisnotrecommendedforapplications requiringultrahighCMRLperformance.Figure33isan alternative drive circuit which, like the recommended application circuit (Figure 25), does achieve ultra high CMRperformancebyshuntingtheLEDintheoffstate.
Under Voltage Lockout Feature
TheHCPL-3150/315Jcontainsanundervoltagelockout (UVLO)featurethatisdesignedtoprotecttheIGBTunder faultconditionswhichcausetheHCPL-3150/315Jsupply voltage(equivalenttothefully-chargedIGBTgatevoltage)todropbelowalevelnecessarytokeeptheIGBTin alowresistancestate.WhentheHCPL-3150/315Joutput isinthehighstateandthesupplyvoltagedropsbelow the HCPL-3150/315J VUVLO- threshold (9.5HCPL-3150/315Joutputisinthelowstateandthesupply voltagerisesabovetheHCPL-3150/315JVUVLO+threshold (11.0CMR with the LED On (CMRH)
AhighCMRLEDdrivecircuitmustkeeptheLEDonduringcommonmodetransients.ThisisachievedbyoverdrivingtheLEDcurrentbeyondtheinputthresholdso thatitisnotpulledbelowthethresholdduringatransient. A minimum LED current of 10 mA provides adequatemarginoverthemaximumIFLHof5mAtoachieve 15kV/sCMR.
Esw - ENERGY PER SWITCHING CYCLE - J
7 Qg = 100 nC 6 5 4 3 2 1 0 0 20 40 60 80 100 Qg = 250 nC Qg = 500 nC VCC = 19 V VEE = -9 V
Rg - GATE RESISTANCE -
Figure 27. Energy Dissipated in the HCPL-3150 for Each IGBT Switching Cycle.
HCPL-3150 fig 27
19
IPM Dead Time and Propagation Delay Specifications
The HCPL-3150/315J includes a Propagation Delay Difference (PDD) specification intended to help designers minimize "dead time" in their power inverter designs. Deadtimeisthetimeperiodduringwhichboththehigh andlowsidepowertransistors(Q1andQ2inFigure25) areoff.AnyoverlapinQ1andQ2conductionwillresult in large currents flowing through the power devices fromthehigh-tothelow-voltagemotorrails. Tominimizedeadtimeinagivendesign,theturnonof LED2shouldbedelayed(relativetotheturnoffofLED1) so that under worst-case conditions, transistor Q1 has justturnedoffwhentransistorQ2turnson,asshownin Figure34.Theamountofdelaynecessarytoachievethis conditionsisequaltothemaximumvalueofthepropagation delay difference specification, PDDMAX, which is specified to be 350ns over the operating temperature rangeof-40Cto100C. Delaying the LED signal by the maximum propagation delay difference ensures that the minimum dead time is zero, but it does not tell a designer what the maximum dead time will be. The maximum dead time is equivalent to the difference between the maximum and minimum propagation delay difference specifications as shown in Figure 35. The maximum dead time for the HCPL-3150/315J is 700ns (= 350ns - (-350ns)) over an operating temperature rangeof-40Cto100C. NotethatthepropagationdelaysusedtocalculatePDD anddeadtimearetakenatequaltemperaturesandtest conditionssincetheoptocouplersunderconsideration are typically mounted in close proximity to each other andareswitchingidenticalIGBTs.
1
CLEDP
8
1
CLEDO1 CLEDP
8
2
7
2
7
CLEDO2
3
CLEDN
6
3
CLEDN
6
4
5
4
SHIELD
5
Figure 29. Optocoupler Input to Output Capacitance Model for Unshielded Optocouplers.
Figure 30. Optocoupler Input to Output Capacitance Model for Shielded Optocouplers.
+5 V
HCPL-3150 fig 29 1
CLEDP ILEDP
8 0.1 F 7 + -
HCPL-3150 fig 30
VCC = 18 V
+ VSAT -
2
3
CLEDN
6
Rg
***
4
SHIELD
5
***
* THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW DURING -dVCM/dt.
+- VCM
Figure 31. Equivalent Circuit for Figure 25 During Common Mode Transient.
HCPL-3150 fig 31
1 +5 V 2
CLEDP
8 +5 V 7
1
CLEDP
8
2
7
Q1
3
CLEDN ILEDN
6
3
CLEDN
6
4
SHIELD
5
4
SHIELD
5
Figure 32. Not Recommended Open Collector Drive Circuit.
Figure 33. Recommended LED Drive Circuit for Ultra-High CMR.
HCPL-3150 fig 32
HCPL-3150 fig 33
ILED1 VOUT1
ILED1 VOUT1
Q1 ON Q1 OFF Q2 ON
Q1 ON Q1 OFF Q2 ON
VOUT2 ILED2
Q2 OFF
VOUT2 ILED2
Q2 OFF
tPHL MAX tPLH MIN PDD* MAX = (tPHL- tPLH)MAX = tPHL MAX - tPLH MIN
tPHL MIN tPHL MAX tPLH
MIN
*PDD = PROPAGATION DELAY DIFFERENCE NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
tPLH MAX (tPHL-tPLH) MAX = PDD* MAX MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER) = (tPHL MAX - tPHL MIN) + (tPLH MAX - tPLH MIN) = (tPHL MAX - tPLH MIN) - (tPHL MIN - tPLH MAX) = PDD* MAX - PDD* MIN *PDD = PROPAGATION DELAY DIFFERENCE NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
Figure 34. Minimum LED Skew for Zero Dead Time.
HCPL-3150 fig 34
Figure 35. Waveforms for Dead Time.
HCPL-3150 fig 35
21
14
VO - OUTPUT VOLTAGE - V
OUTPUT POWER - PS, INPUT CURRENT - IS
800 700 600 500 400 300 200 100 0 0 25 50 75 100 125 150 175 200 PS (mW) IS (mA)
12 10 8 6 4 2 0 (10.7, 0.1) 0 5 10 (12.3, 0.1) 15 20 (12.3, 10.8) (10.7, 9.2)
(VCC - VEE ) - SUPPLY VOLTAGE - V
TS - CASE TEMPERATURE - C
Figure 36. Under Voltage Lock Out.
HCPL-3150 fig 36
Figure 37a. HCPL-3150: Thermal Derating Curve, Dependence of Safety Limiting Value with Case Temperature per IEC/EN/ DIN EN 60747-5-2. HCPL-3150 fig 37
1400 1200
PSI - POWER - mW
PSI OUTPUT PSI INPUT
1000 800 600 400 200 0 0 25 50 75 100 125 150 175 200
TS - CASE TEMPERATURE - C
Figure 37b. HCPL-315J: Thermal Derating Curve, Dependence of Safety Limiting Value with Case Temperature per IEC/EN/DIN EN 60747-5-2.
HCPL-3150 fig 37b
For product information and a complete list of distributors, please go to our website:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright (c) 2005-2008 Avago Technologies Limited. All rights reserved. Obsoletes 5989-2944EN AV02-0164EN - April 10, 2008

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